DRDO DYSL-QT Recruitment 2026: Apply for 2 JRF (Electronics) Posts | Stipend ₹37,000, Check Eligibility & Last Date
DRDO’s Young Scientist Laboratory – Quantum Technologies (DYSL-QT), Pune has released a fresh notification inviting applications for Junior Research Fellowship (JRF) in the Electronics discipline. This is a golden opportunity for B.E/B.Tech or M.E/M.Tech holders interested in cutting-edge Quantum Technology research. Only 2 vacancies are available, selection is through interview only, and the fellowship offers a handsome monthly stipend. Candidates must apply offline within 30 days of the advertisement’s publication in Employment News, so quick action is essential.
🏢 Organization Details
| Detail | Information |
|---|---|
| Recruiting Body | DRDO Young Scientist Laboratory – Quantum Technologies (DYSL-QT) |
| Post Name | Junior Research Fellow (JRF) – Electronics |
| Advertisement No. | 01/2025-26 |
| Job Location | DIAT Campus, Girinagar, Pune – 411025, Maharashtra |
DYSL-QT is one of DRDO’s specialized Young Scientist Labs, dedicated to advanced research in Quantum Computing, Quantum Communication, and Quantum Sensing. The lab works in collaboration with top institutes like IITs and central/state universities, making this fellowship a great stepping stone for research-oriented engineering graduates who want hands-on exposure to futuristic defence technology.
📊 Number of Vacancies & Reservation
Total Posts: 2 (JRF – Electronics)
No category-wise (UR/OBC/SC/ST/EWS/PwBD) breakdown has been provided in this notification for these 2 posts.
Since the total number of seats is very limited, competition for this DRDO fellowship is expected to be high among electronics and VLSI/embedded systems aspirants. Candidates with strong academic records and relevant project exposure will have a clear edge in the interview-based selection.
🎓 Discipline & Educational Qualification
Post: JRF (Electronics) — Minimum Eligibility
Option A — B.E./B.Tech in any of the following, with electives in VLSI Design, Embedded Systems, or Digital Signal Processing, in 1st Division, plus a valid GATE/NET score:
- Electronics & Communication Engineering (ECE)
- Electronics & Telecommunication Engineering (ETE)
- Electronics & Instrumentation Engineering (EIE)
- Electronics Engineering
- Electrical & Electronics Engineering (EEE)
- Electrical Engineering (EE)
OR
Option B — M.E./M.Tech in the same disciplines listed above, with specialisation in VLSI Design, Embedded Systems, or Digital Signal Processing, in 1st Division at both graduate and postgraduate level.
Desirable Qualification: Knowledge of VERILOG/VHDL, FPGAs, and tools like Vivado and Vitis IDE.
This eligibility criterion is designed for candidates with a strong electronics and embedded-systems background. Having hands-on skills in hardware description languages and FPGA tools will significantly boost your chances during the interview round.
📉 Minimum Qualifying Marks
Candidates must hold a 1st Division (typically 60% or equivalent CGPA, as per their university norms) at the qualifying degree level. No separate category-wise cutoff marks have been specified in this notification.
Note: Candidates must attach proof of the CGPA-to-percentage conversion formula issued by their University/Institution along with the application, so this paperwork should not be ignored.
🎂 Age Limit
- Maximum Age: 28 years (as on the last date of receipt of application)
- Age Relaxation: Applicable for SC, ST, and OBC (Non-Creamy Layer) candidates as per government rules in force
Since this is a research fellowship aimed at fresh and early-career talent, the age cap is kept relatively low. Reserved category candidates should make sure to check the exact relaxation years applicable to them under current Govt. norms.
💰 Application Fee
No application fee has been mentioned in this notification. The advertisement is silent on any fee requirement, so candidates can apply without worrying about a payment step — just ensure all required documents are attached.
⚙️ Selection Process
Selection will be made purely through Interview — there is no written exam, CBT, or skill test mentioned for this recruitment.
Date, time, venue, and mode of the interview will be communicated to shortlisted candidates by post and email, so keeping your contact details updated is crucial. Since there’s no written test to filter candidates first, the interview itself becomes the deciding factor, making thorough subject preparation extremely important.
📚 Examination Syllabus
Not Applicable — There is no written examination for this recruitment. Selection is interview-based only, so no formal syllabus or exam pattern has been issued.
Candidates should instead prepare core electronics, VLSI, embedded systems, and DSP concepts (as per the qualification criteria) for the interview, along with their academic projects and desirable skills like VERILOG/VHDL and FPGA tools.
📅 Important Dates
| Event | Date |
|---|---|
| Advertisement No. | 01/2025-26 |
| Last Date to Apply | Within 30 days from the date of publication of this advertisement in Employment News |
| Interview Date | To be intimated separately to shortlisted candidates |
Since the deadline is calculated from the Employment News publication date (not a fixed calendar date), candidates must check the official notification or Employment News issue immediately to confirm the exact last date and avoid missing the window.
📝 How to Apply
- Download the application form and detailed advertisement from www.drdo.gov.in (under “What’s New” > Application for the post of JRF at DYSL-QT, Pune).
- Fill the application form carefully with accurate personal, educational, and contact details.
- Attach self-attested copies of all educational qualification certificates and experience documents.
- Attach proof of CGPA-to-percentage conversion formula from your University/Institution (mandatory).
- Send the duly filled application by post to: The Director, DYSL-QT, DRDO, Hall No. 1, Ground Floor, Vigyan Upakendra, DIAT Campus, Girinagar, Pune – 411025, Maharashtra.
- Superscribe the envelope with “Application for JRF” at the top left corner.
- Additionally, email a soft copy of the application to [email protected].
- Government/PSU/Autonomous Body employees must apply through proper channel and submit a signed declaration (Annexure II) plus a No Objection Certificate (Annexure III) at the time of interview.
This is an offline application process only — there is no online portal for this particular DRDO recruitment, so postal timing and accuracy of documents matter a lot. Double-check every attachment before sending, since incomplete applications risk rejection.
📜 General Conditions
- The fellowship is initially for 2 years, extendable by another 2 years as per applicable rules.
- A merit/discipline-wise panel of selected candidates will be maintained for 1 year from the date of declaration, to fill current and future vacancies.
- Stipend: ₹37,000 per month plus HRA as applicable.
- This is a purely temporary engagement and does not confer any right to absorption in DRDO.
- Candidates who have already availed a JRF position in any DRDO Laboratory/Centre earlier are not eligible to apply again.
- For any clarification, candidates may contact: 7980796459.
These conditions make it clear that this is a fixed-tenure research fellowship, not a permanent government job, and prior DRDO JRF holders cannot reapply. Reading these terms carefully avoids confusion later about job security or extension.
🔗 Important Links
- Apply Online: Not applicable (offline/postal application only)
- Official Notification: Available on www.drdo.gov.in → What’s New → Application for the post of JRF at DYSL-QT, Pune
- Official Website: www.drdo.gov.in
- Email for Queries/Forms: [email protected]
❓ FAQ Section
The application must reach the office within 30 days from the date this advertisement is published in Employment News. Candidates should check the exact Employment News issue date to calculate the precise deadline.
Candidates with a B.E/B.Tech (1st Division) with electives in VLSI, Embedded Systems, or DSP plus valid GATE/NET score, OR an M.E/M.Tech (1st Division) with specialisation in the same areas, in disciplines like ECE, ETE, EIE, EEE, or EE, can apply.
Selected candidates will receive a stipend of Rs. 37,000 per month plus House Rent Allowance (HRA) as applicable under government rules.
Selection is purely through an Interview. There is no written exam or CBT for this post. Shortlisted candidates will be informed of the interview date, time, and venue via post and email.
The upper age limit is 28 years as on the last date of receipt of application. Age relaxation is applicable for SC, ST, and OBC (Non-Creamy Layer) candidates as per government norms.
There are a total of 2 vacancies available for the JRF (Electronics) position at DYSL-QT, Pune.
No, this recruitment is offline only. Candidates must send the filled application by post to the Director, DYSL-QT, Pune, and also email a soft copy to [email protected].
⚠️ Disclaimer
Please verify all details from the official DRDO website or the original notification/Employment News advertisement before applying. CurrentOpenings (currentopenings.in) is not responsible for any mismatch, error, or update in the information provided above.
| Advertisement No. | 01/2025-26 |
| Total Vacancies | 2 |
| Job Type | Fellowships |
| Apply Date | 17 Jun 2026 — 16 Jul 2026 Expired |
| Job Location | 📍 Pune |
| Official Advertisement | Download PDF |
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